With the rapid development of the semiconductor industry, the application field of various power chips becomes broader and broader. For example, the power chips may be used for the control of AC motors, the driving circuit of a flat panel display, the driving circuit of a printer, a sound power amplifier system, and so on. The driving chips all have driving loads.
Power transistor (MOSFET) has advantages of low on-resistance and high load current, and is highly suitable for functioning as the rectifying component of an SMPS (Switch-Mode Power Supply). The most important characteristic of a power MOSFET is that, the greater the on-resistance Ron is, the higher the output power of the power MOSFET will be. With the idea condition, the on-resistance Ron may be zero. In practical, the on-resistance of a power MOSFET is represented by the following formula:
  Ron  =      1          μ      ⁢                          ⁢              C        OX            ⁢              W        L            ⁢              (                              V            GS                    -                      V            T                          )            
Wherein, μ is carrier mobility, COX is gate capacitance of the power MOSFET per unit-area; W/L is aspect ratio of the power MOSFET; (VGS−VT) is over driving voltage, wherein VGS is the modulated driving voltage applied to the gate of the power MOSFET; VT is the threshold voltage of the power MOSFET. It can be seen from the above formula that: the greater W/L is, the greater (VGS−VT) will be, and the smaller Ron will be. In the prior art, the output power of the power MOSFET is usually improved by increasing the aspect ratio W/L of the power MOSFET, i.e., by increasing the area of the power MOSFET. However, when the area is increased, the cost of an integrated circuit will be increased. It can also be seen from the above formula that the Ron of the power MOSFET is also related to the over driving voltage (VGS−VT); the greater the over driving voltage (VGS−VT) is, the smaller the Ron will be, that is, the greater the output power of the power MOSFET will be. The modulated driving voltage VGS input to the power MOSFET is usually obtained by a driving circuit.
At present, a CMOS driving circuit with at least one buffer stage is usually used to drive the power MOSFET. Each buffer stage of the CMOS driving circuit has a PMOS transistor and an NMOS transistor between the power supply and the ground. In the CMOS, with a control signal, the NMOS transistor may be in off-state (on-state) when the PMOS transistor is in on-state (off-state). When the PMOS transistor is in on-state and the NMOS transistor is in off-state, the output terminal is shorted with the power supply, and a high voltage is output. However, when the PMOS transistor is in off-state and the NMOS transistor is in on-state, the output terminal is shorted with the ground, and a low voltage is output.
U.S. Pat. No. 7,126,388 discloses a CMOS driving circuit. FIG. 1 shows a two-stage buffer stage 27 in CMOS driving circuit 100 of the prior art. The CMOS driving circuit disclosed in this patent includes multistage buffer stages. The source of PMOS transistor 55 at each buffer stage is connected with DC voltage input terminal 41, and the drain of PMOS transistor 55 at each buffer stage is connected with the drain of NMOS transistor 56 and is led out as output terminal 49 of the buffer stage. The source of NMOS transistor 56 is connected to terminal 50 which is usually grounded. The gate of PMOS transistor 55 is connected with the gate of NMOS transistor 56 and is connected with the output terminal of last buffer stage. A timing signal generated by a clock is input to the gate of the NMOS transistor and the gate of the PMOS transistor at the first buffer stage. The output terminal of the final buffer stage is connected with the gate of the power transistor. The area of the PMOS transistor and the NMOS transistor at each buffer stage is larger than the area of the transistors of last buffer stage, so that a larger driving current may be obtained.
However, when a power transistor is driven with the above CMOS driving circuit, the modulated driving voltage is output as a single voltage. If this voltage is a low voltage, the output power of the power transistor will be small. To increase the output power of the power transistor, the area of the power transistor may be increased, thus the cost is increased. In multi-voltage systems, for example, in a voltage converting circuit, the CMOS driving circuit of the prior art cannot flexibly use the high-voltage driving capacity.